SOT223 N-CHANNEL ENHANCEMENT MODE
LOW THRESHOLD VERTICAL DMOS FET
ZVNL120G
ISSUE 2 - JANUARY 1996
FEATURES
* V DS - 200V
* R DS(ON) - 10 ?
7
D
PARTMARKING DETAIL - ZVNL120
ABSOLUTE MAXIMUM RATINGS.
G
D
S
PARAMETER
Drain-Source Voltage
Continuous Drain Current at T amb =25°C
Pulsed Drain Current
Gate-Source Voltage
Power Dissipation at T amb =25°C
Operating and Storage Temperature Range
SYMBOL
V DS
I D
I DM
V GS
P tot
T j :T stg
VALUE
200
320
2
± 20
2
-55 to +150
UNIT
V
mA
A
V
W
°C
ELECTRICAL CHARACTERISTICS (at T amb = 25°C unless otherwise stated).
PARAMETER
SYMBOL MIN.
MAX. UNIT CONDITIONS.
Drain-Source Breakdown
BV DSS
200
V
I D =1mA, V GS =0V
Voltage
Gate-Source Threshold Voltage V GS(th)
0.5
1.5
V
I D =1mA, V DS = V GS
Gate-Body Leakage
Zero Gate Voltage Drain
Current
I GSS
I DSS
100
10
100
nA
μ A
μ A
V GS = ± 20V, V DS =0V
V DS =200V, V GS =0V
V DS =160V, V GS =0V,
T=125°C (2)
On-State Drain Current(1)
Static Drain-Source On-State
Resistance (1)
I D(on)
R DS(on)
500
10
10
mA
?
?
V DS =25V, V GS =5V
V GS =5V, I D =250mA
V GS =3V, I D =125mA
Forward Transconductance(1)(2) g fs
200
mS
V DS =25V, I D =250mA
Input Capacitance (2)
C iss
85
pF
Common Source Output
C oss
20
pF
V DS =25V, V GS =0V, f=1MHz
Capacitance (2)
Reverse Transfer Capacitance (2) C rss
7
pF
Turn-On Delay Time (2)(3)
t d(on)
8
ns
Rise Time (2)(3)
Turn-Off Delay Time (2)(3)
Fall Time (2)(3)
t r
t d(off)
t f
8
20
12
ns
ns
ns
V DD ≈ 25V, I D =250mA
(1) Measured under pulsed conditions. Width=300 μ s. Duty cycle ≤ 2% (2) Sample test.
(3) Switching times measured with 50 ? source impedance and <5ns rise time on a pulse generator
3 - 420
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